Design of a Linear Floating Active Resistor with Low Temperature Coefficient
This paper presents the design and implementation of a linear, stable, low-power and PVT insensitive floating active resistor, which is realized using TSMC 40 nm CMOS process technology. By incorporating the automatic tuning circuit, this work has achieved improved performance metrics, which include...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2025-04-01
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| Series: | Chips |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2674-0729/4/2/18 |
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