Efficient AES-XTS Pipelined Implementation on FPGA
In past years, it has been considered that only data communicated via networks need to be secured. This paradigm now shifted towards securing data at rest. With its increasing significance, IEEE has introduced a mode of Advanced Encryption Standard (AES) named as XTS-AES. Few of its implementations...
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| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Sir Syed University of Engineering and Technology, Karachi.
2014-12-01
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| Series: | Sir Syed University Research Journal of Engineering and Technology |
| Subjects: | |
| Online Access: | http://www.sirsyeduniversity.edu.pk/ssurj/rj/index.php/ssurj/article/view/56 |
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