Effect of coarsely quantization on next generation systems with low-density parity check codes
Fifth-generation (5 G) telecommunication systems demand high data transfer rates and low power consumption, creating challenges in system design due to the trade-off between these two factors. LDPC (Low-Density Parity-Check) coding has emerged as a key solution in 5 G networks, owing to its low comp...
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| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Elsevier
2025-09-01
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| Series: | Results in Engineering |
| Subjects: | |
| Online Access: | http://www.sciencedirect.com/science/article/pii/S2590123025018146 |
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| Summary: | Fifth-generation (5 G) telecommunication systems demand high data transfer rates and low power consumption, creating challenges in system design due to the trade-off between these two factors. LDPC (Low-Density Parity-Check) coding has emerged as a key solution in 5 G networks, owing to its low complexity and robust error-correction capabilities. However, the high data rates in 5 G require analog-to-digital converters (ADCs) with higher bit resolutions, which, in turn, significantly increase power consumption. Conversely, reducing the ADC bit resolution lowers power consumption but may result in higher error rates. This study investigates the optimal selection of quantization bits for 5 G systems, examining the impact of bit resolution on both power consumption and error performance. Through simulation, the performance of 1-bit to 8-bit ADCs in conjunction with LDPC encoding is analyzed, with results indicating that 3-bit quantization provides a suitable balance between error rates and power efficiency. The findings suggest that employing low-resolution ADCs can effectively reduce power consumption without compromising the overall performance of the system in terms of bit and block error rates, as well as the error vector magnitude. |
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| ISSN: | 2590-1230 |