Large Active Area, Low Capacitance Multi-Dot PIN Photodiode in 0.35 m CMOS Technology<inline-formula><tex-math notation="LaTeX"/></inline-formula>
This article presents a multi-dot PIN photodiode structure that addresses the inherent trade-off between the light-sensitive area and capacitance in conventional planar photodiodes commonly used in optical communication systems. This structure is a combination of several connected cathode dots and w...
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| 主要な著者: | , , , |
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| フォーマット: | 論文 |
| 言語: | 英語 |
| 出版事項: |
IEEE
2024-01-01
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| シリーズ: | IEEE Photonics Journal |
| 主題: | |
| オンライン･アクセス: | https://ieeexplore.ieee.org/document/10336890/ |
| タグ: |
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