A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System
As an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residue number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converte...
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| Language: | English |
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OICC Press
2024-05-01
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| Series: | Majlesi Journal of Electrical Engineering |
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| Online Access: | https://oiccpress.com/mjee/article/view/7980 |
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| author | Ailin Asadpour Amir Sabbagh Azadeh Emrani |
| author_facet | Ailin Asadpour Amir Sabbagh Azadeh Emrani |
| author_sort | Ailin Asadpour |
| collection | DOAJ |
| description | As an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residue number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converters to communicate with other digital circuits. Designing reversible forward and reverse converters using new technologies is very important due to their wide applications in implementing the RNS. These converters, which are the overhead of the system, increase energy consumption. This study proposes a hybrid converter conforming to reversible logic for the RNS. This hybrid converter unifies forward and reverse converters by sharing hardware and reversible gates. By using the mixed-radix conversion (MRC), the reverse conversion arithmetic relations adopt a similar format to that of the forward conversion arithmetic relations, and by the addition of a number of Fredkin gates and modifying the inputs, the reverse converter hardware is used to perform forward conversion. Based on the findings, the hybrid converter, which conformed to reversible logic for the moduli set {2^2n,2^n-1,2^(n+1)-1} and {2^n-1,2^n+1,2^2n+1}, decreased the quantum cost to 19.56% and 19.52%, respectively. |
| format | Article |
| id | doaj-art-f2238f03bbee4d79a3bd0f45b35d3c5a |
| institution | Matheson Library |
| issn | 2345-377X 2345-3796 |
| language | English |
| publishDate | 2024-05-01 |
| publisher | OICC Press |
| record_format | Article |
| series | Majlesi Journal of Electrical Engineering |
| spelling | doaj-art-f2238f03bbee4d79a3bd0f45b35d3c5a2025-07-08T00:05:09ZengOICC PressMajlesi Journal of Electrical Engineering2345-377X2345-37962024-05-0118210.57647/j.mjee.2024.1802.29A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number SystemAilin AsadpourAmir SabbaghAzadeh EmraniAs an emerging technology, reversible computing enables the development of high-performance computing systems with low energy consumption. A residue number system (RNS) that performs arithmetic operations in parallel with error tolerance and no carry propagation requires forward and reverse converters to communicate with other digital circuits. Designing reversible forward and reverse converters using new technologies is very important due to their wide applications in implementing the RNS. These converters, which are the overhead of the system, increase energy consumption. This study proposes a hybrid converter conforming to reversible logic for the RNS. This hybrid converter unifies forward and reverse converters by sharing hardware and reversible gates. By using the mixed-radix conversion (MRC), the reverse conversion arithmetic relations adopt a similar format to that of the forward conversion arithmetic relations, and by the addition of a number of Fredkin gates and modifying the inputs, the reverse converter hardware is used to perform forward conversion. Based on the findings, the hybrid converter, which conformed to reversible logic for the moduli set {2^2n,2^n-1,2^(n+1)-1} and {2^n-1,2^n+1,2^2n+1}, decreased the quantum cost to 19.56% and 19.52%, respectively.https://oiccpress.com/mjee/article/view/7980Arithmetic Digital CircuitsComputer ArithmeticForward ConverterModuli AdderResidue Number System (RNS)Reverse Converter |
| spellingShingle | Ailin Asadpour Amir Sabbagh Azadeh Emrani A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System Majlesi Journal of Electrical Engineering Arithmetic Digital Circuits Computer Arithmetic Forward Converter Moduli Adder Residue Number System (RNS) Reverse Converter |
| title | A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System |
| title_full | A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System |
| title_fullStr | A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System |
| title_full_unstemmed | A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System |
| title_short | A Hybrid Forward/Reverse Converter in Reversible Logic to Reduce Hardware Complexity of Residual Number System |
| title_sort | hybrid forward reverse converter in reversible logic to reduce hardware complexity of residual number system |
| topic | Arithmetic Digital Circuits Computer Arithmetic Forward Converter Moduli Adder Residue Number System (RNS) Reverse Converter |
| url | https://oiccpress.com/mjee/article/view/7980 |
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