Utilizing Symmetric BSIM-SOI SPICE Model for Dynamically Depleted RF SOI T/R Switches and Logic Circuits

In this paper, we present the symmetric BSIM-SOI compact model, specifically designed for Dynamically Depleted Silicon-on-Insulator (DDSOI) MOSFETs, with an emphasis on optimizing their performance in RF Transmit/Receive (T/R) switch applications. This surface potential-based model provides a compre...

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主要な著者: Debashish Nandi, Chetan Kumar Dabhi, Dinesh Rajasekharan, Naveen Karumuri, Sreenidhi Turuvekere, Balaji Swaminathan, Srikanth Srihari, Anupam Dutta, Chenming Hu, Yogesh Singh Chauhan
フォーマット: 論文
言語:英語
出版事項: IEEE 2025-01-01
シリーズ:IEEE Journal of the Electron Devices Society
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オンライン・アクセス:https://ieeexplore.ieee.org/document/10726570/
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