Hardware implementation of RSA encryption algorithm based on pipeline
To address the high cost of implementing long-bits RSA encryption algorithms in hardware, improvements have been made to the traditional radix-4 Montgomery algorithm. Firstly, a Carry-Save Adder (CSA) is introduced to efficiently complete large numbers of addition computations. Optimization is then...
Saved in:
Main Authors: | Yang Longfei, Lu Shi, Peng Kuang |
---|---|
Format: | Article |
Language: | Chinese |
Published: |
National Computer System Engineering Research Institute of China
2024-01-01
|
Series: | Dianzi Jishu Yingyong |
Subjects: | |
Online Access: | http://www.chinaaet.com/article/3000163443 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Introducing Primality Testing Algorithm with an Implementation on 64 bits RSA Encryption Using Verilog
by: Rehan Shams, et al.
Published: (2018-12-01) -
Next-generation ECC processor on FPGA: Leveraging Koblitz curves for enhanced performance
by: Tung Nguyen, et al.
Published: (2025-09-01) -
Robust Color Image Encryption Scheme Based on RSA via DCT by Using an Advanced Logic Design Approach
by: Khalid Kadhim Jabbar, et al.
Published: (2023-12-01) -
The Implementation of the Physical Unclonable Function in a Field-Programmable Gate Array for Enhancing Hardware Security
by: Kuang-Hao Lin, et al.
Published: (2025-04-01) -
HARDWARE IMPLEMENTATION OF VIDEO PROCESSING DEVICE USING RESIDUE NUMBER SYSTEM
by: P. A. Lyakhov, et al.
Published: (2022-08-01)