The Design of CMOS-Compatible Plasmonic Waveguides for Intra-Chip Communication

The Design of CMOS-Compatible Plasmonic Waveguides for Intra-Chip Communication

A CMOS-compatible plasmonic waveguide with a metal or metal-like strip sandwiched in-between dielectrics has been proposed for intra-chip communication in the more-than-Moore era. A sequence of numerical models has been presented to evaluate the plasmonic waveguide performance. For device-level cons...

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Bibliographic Details
Main Authors: Yan Liu, Lu Ding, Yu Cao, Dongyang Wan, Guanghui Yuan, Baohu Huang, Aaron Voon-Yew Thean, Ting Mei, Thirumalai Venkatesan, Christian A. Nijhuis, Soojin Chua
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Photonics Journal
Subjects:
CMOS-compatible plasmonic waveguide
Long-range SPP
high integration density
Signal latency
Energy dissipation
Link throughput
Online Access:https://ieeexplore.ieee.org/document/9198892/
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Summary:A CMOS-compatible plasmonic waveguide with a metal or metal-like strip sandwiched in-between dielectrics has been proposed for intra-chip communication in the more-than-Moore era. A sequence of numerical models has been presented to evaluate the plasmonic waveguide performance. For device-level consideration, we demonstrated through simulations that Cu (1450&#x00A0;nm pitch) and PLD-TiN (900&#x00A0;nm pitch) plasmonic waveguides symmetrically sandwiched by SiO<sub>2</sub> with much smaller and hence denser interconnects, are promising candidates for use in global wires for the asynchronous communication. This design of plasmonic waveguide can bridge the CMOS circuitry and high-speed communication at optical frequencies within chip. For a system-level assessment, both of them have the same bandwidth throughput of &#x223C;19.8 Gbps. The other performance parameters of Cu and PLD-TiN plasmonic waveguides are respectively, signal latency of &#x223C;<inline-formula><tex-math notation="LaTeX">$0.18\text{ ps}\ $</tex-math></inline-formula>and <inline-formula><tex-math notation="LaTeX">$0.19\text{ ps},$</tex-math></inline-formula> energy dissipation per computing bit of &#x223C;<inline-formula><tex-math notation="LaTeX">$2.5 \times {10^{ - 3}}{\rm{\ fJ}}/{\rm{bit}}$</tex-math></inline-formula> and <inline-formula><tex-math notation="LaTeX">$3.8 \times {10^{ - 3}}{\rm{\ fJ}}/{\rm{bit}}$</tex-math></inline-formula>, and 25&#x0025; crosstalk coupling length of <inline-formula><tex-math notation="LaTeX">$155{\rm{\ \mu m}}$</tex-math></inline-formula> and <inline-formula><tex-math notation="LaTeX">$125{\rm{\ \mu}} \text{m}$</tex-math></inline-formula>. These findings suggest that plasmonic waveguide for intra-chip communication surpass those of existing electronic interconnects for all the categories of performance parameters.
ISSN:1943-0655

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