L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering
Spike sorting is a critical process for decoding large-scale neural activity from extracellular recordings. The advancement of neural probes facilitates the recording of a high number of neurons with an increase in channel counts, arising a higher data volume and challenging the current on-chip spik...
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2025-01-01
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| Series: | IEEE Open Journal of Circuits and Systems |
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| Online Access: | https://ieeexplore.ieee.org/document/11072521/ |
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| author | Yuntao Han Yihan Pan Xiongfei Jiang Cristian Sestito Shady Agwa Themis Prodromakis Shiwei Wang |
| author_facet | Yuntao Han Yihan Pan Xiongfei Jiang Cristian Sestito Shady Agwa Themis Prodromakis Shiwei Wang |
| author_sort | Yuntao Han |
| collection | DOAJ |
| description | Spike sorting is a critical process for decoding large-scale neural activity from extracellular recordings. The advancement of neural probes facilitates the recording of a high number of neurons with an increase in channel counts, arising a higher data volume and challenging the current on-chip spike sorters. This paper introduces L-Sort, a novel on-chip spike sorting solution featuring median-of-median spike detection and localization-based clustering. By combining the median-of-median approximation and the proposed incremental median calculation scheme, our detection module achieves a reduction in memory consumption. Moreover, the localization-based clustering utilizes geometric features instead of morphological features, thus eliminating the memory-consuming buffer for containing the spike waveform during feature extraction. Evaluation using Neuropixels datasets demonstrates that L-Sort achieves competitive sorting accuracy with reduced hardware resource consumption. Implementations on FPGA and ASIC (180 nm technology) demonstrate significant improvements in area and power efficiency compared to state-of-the-art designs while maintaining comparable accuracy. If normalized to 22 nm technology, our design can achieve roughly <inline-formula> <tex-math notation="LaTeX">$\times 10$ </tex-math></inline-formula> area and power efficiency with similar accuracy, compared with the state-of-the-art design evaluated with the same dataset. Therefore, L-Sort is a promising solution for real-time, high-channel-count neural processing in implantable devices. |
| format | Article |
| id | doaj-art-b9b2e18c257a4e5fb2f2d6835e3a124f |
| institution | Matheson Library |
| issn | 2644-1225 |
| language | English |
| publishDate | 2025-01-01 |
| publisher | IEEE |
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| series | IEEE Open Journal of Circuits and Systems |
| spelling | doaj-art-b9b2e18c257a4e5fb2f2d6835e3a124f2025-08-01T23:01:49ZengIEEEIEEE Open Journal of Circuits and Systems2644-12252025-01-01620521610.1109/OJCAS.2025.358431711072521L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based ClusteringYuntao Han0https://orcid.org/0009-0005-0691-3905Yihan Pan1https://orcid.org/0000-0002-2666-5540Xiongfei Jiang2https://orcid.org/0000-0002-8736-2914Cristian Sestito3https://orcid.org/0000-0002-7731-0002Shady Agwa4https://orcid.org/0000-0002-6678-6283Themis Prodromakis5https://orcid.org/0000-0002-6267-6909Shiwei Wang6https://orcid.org/0000-0002-5450-2108Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, U.K.Spike sorting is a critical process for decoding large-scale neural activity from extracellular recordings. The advancement of neural probes facilitates the recording of a high number of neurons with an increase in channel counts, arising a higher data volume and challenging the current on-chip spike sorters. This paper introduces L-Sort, a novel on-chip spike sorting solution featuring median-of-median spike detection and localization-based clustering. By combining the median-of-median approximation and the proposed incremental median calculation scheme, our detection module achieves a reduction in memory consumption. Moreover, the localization-based clustering utilizes geometric features instead of morphological features, thus eliminating the memory-consuming buffer for containing the spike waveform during feature extraction. Evaluation using Neuropixels datasets demonstrates that L-Sort achieves competitive sorting accuracy with reduced hardware resource consumption. Implementations on FPGA and ASIC (180 nm technology) demonstrate significant improvements in area and power efficiency compared to state-of-the-art designs while maintaining comparable accuracy. If normalized to 22 nm technology, our design can achieve roughly <inline-formula> <tex-math notation="LaTeX">$\times 10$ </tex-math></inline-formula> area and power efficiency with similar accuracy, compared with the state-of-the-art design evaluated with the same dataset. Therefore, L-Sort is a promising solution for real-time, high-channel-count neural processing in implantable devices.https://ieeexplore.ieee.org/document/11072521/Spike sortingspike localizationneural signal processingdigital ASIChigh-density neural probe |
| spellingShingle | Yuntao Han Yihan Pan Xiongfei Jiang Cristian Sestito Shady Agwa Themis Prodromakis Shiwei Wang L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering IEEE Open Journal of Circuits and Systems Spike sorting spike localization neural signal processing digital ASIC high-density neural probe |
| title | L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering |
| title_full | L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering |
| title_fullStr | L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering |
| title_full_unstemmed | L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering |
| title_short | L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering |
| title_sort | l sort on chip spike sorting with efficient median of median detection and localization based clustering |
| topic | Spike sorting spike localization neural signal processing digital ASIC high-density neural probe |
| url | https://ieeexplore.ieee.org/document/11072521/ |
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