APA (7th ed.) Citation

Swathi, S., Sharma, N., & Neeraja, S. (2025). Design and implementation of FinFET and GnrFET based nano arithmetic logic unit. Elsevier.

Chicago Style (17th ed.) Citation

Swathi, Samanthapudi, Nirmal Sharma, and S. Neeraja. Design and Implementation of FinFET and GnrFET Based Nano Arithmetic Logic Unit. Elsevier, 2025.

MLA (9th ed.) Citation

Swathi, Samanthapudi, et al. Design and Implementation of FinFET and GnrFET Based Nano Arithmetic Logic Unit. Elsevier, 2025.