Shams, R., Khan, F. H., Jillani, U., & Umair, M. (2018). Introducing Primality Testing Algorithm with an Implementation on 64 bits RSA Encryption Using Verilog. Sir Syed University of Engineering and Technology, Karachi.
Chicago Style (17th ed.) CitationShams, Rehan, Fozia Hanif Khan, Umair Jillani, and M. Umair. Introducing Primality Testing Algorithm with an Implementation on 64 Bits RSA Encryption Using Verilog. Sir Syed University of Engineering and Technology, Karachi, 2018.
MLA (9th ed.) CitationShams, Rehan, et al. Introducing Primality Testing Algorithm with an Implementation on 64 Bits RSA Encryption Using Verilog. Sir Syed University of Engineering and Technology, Karachi, 2018.
Warning: These citations may not always be 100% accurate.