APA (7th ed.) Citation

An, Y., Kim, H., Son, D., Yu, H., & Shim, Y. (2025). Dual-Mode 2T1C DRAM Process-In-Memory Architecture for Boolean and MAC Operations. IEEE.

Chicago Style (17th ed.) Citation

An, Yerim, Honggu Kim, Dongjun Son, Hakrae Yu, and Yong Shim. Dual-Mode 2T1C DRAM Process-In-Memory Architecture for Boolean and MAC Operations. IEEE, 2025.

MLA (9th ed.) Citation

An, Yerim, et al. Dual-Mode 2T1C DRAM Process-In-Memory Architecture for Boolean and MAC Operations. IEEE, 2025.