Design and verification of HDLC data frame parallel search and decapsulation module
The HDLC signal link is the high level data link control(HDLC) developed by the international organization for standar- dization(ISO). The article follows the HDLC standard data link layer specification, uses the hardware description language Verilog HDL to implement a parallel structure-based HDLC...
Saved in:
Main Authors: | Qian Yong, Liu Wei |
---|---|
Format: | Article |
Language: | Chinese |
Published: |
National Computer System Engineering Research Institute of China
2022-01-01
|
Series: | Dianzi Jishu Yingyong |
Subjects: | |
Online Access: | http://www.chinaaet.com/article/3000145084 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Storage of Decapsulated Artemia (Brine Shrimp)
by: Jason Broach, et al.
Published: (2018-05-01) -
Storage of Decapsulated Artemia (Brine Shrimp)
by: Jason Broach, et al.
Published: (2018-05-01) -
Picture framing techniques /
by: Lister, Mark
Published: (1987) -
Eternal-Thing 3.0: Mixed-Mode SoC for Energy Harvesting System Towards Sustainable IoT
by: Saswat Kumar Ram, et al.
Published: (2025-01-01) -
Parallel Processing of Sobel Edge Detection on FPGA: Enhancing Real-Time Image Analysis
by: Sanmugasundaram Ravichandran, et al.
Published: (2025-06-01)