A method of eMMC lifetime verification based on FPGA
In order to meet the requirements of testing the long-term read and write performance of eMMC storage particles, an eMMC life verification design method is studied based on FPGA. Combined with eMMC working principle and high speed DDR（double rate）bus mode, the core components of verification system...
Saved in:
| Main Authors: | , , , , |
|---|---|
| Format: | Article |
| Language: | Chinese |
| Published: |
National Computer System Engineering Research Institute of China
2024-02-01
|
| Series: | Dianzi Jishu Yingyong |
| Subjects: | |
| Online Access: | http://www.chinaaet.com/article/3000163488 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | In order to meet the requirements of testing the long-term read and write performance of eMMC storage particles, an eMMC life verification design method is studied based on FPGA. Combined with eMMC working principle and high speed DDR（double rate）bus mode, the core components of verification system are designed in detail. FPGA（xc7a50tffgg484-1）is adopted as main control chip and four pieces of eMMC（FEMDRW064G-88A19）are selected as verification objects. The initial configuration method of eMMC is analyzed, and the module of open read and write is designed. With the control commands of the eMMC monitoring software, 180 000 times of loop read and write based on the blocks is completed. All the test results are passed, and the average read/write speed can reach 31 MB/s. |
|---|---|
| ISSN: | 0258-7998 |