Reduced instruction set computer architectures for VLSI

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Bibliographic Details
Main Author:	Katevenis, Manolis G. H.
Format:	Book
Language:	English
Published:	Cambridge, Mass MIT Press c1985
Series:	ACM doctoral dissertation awards 1984
Subjects:	Computer architecture Integrated circuits > Very large scale integration
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LEADER	00000nam a2200000 4500
001	00568309
003	PWmBRO
005	20240602100826.0
008	860617s1985 maua a o0011 eng l
082	0	0	\|a 621.3819 \|b 5835 \|z 19
090	0	0	\|b 621.3819 \|b 5835/K19r
100	1	0	\|a Katevenis, Manolis G. H.
245	1	0	\|a Reduced instruction set computer architectures for VLSI \|c Manolis G.H. Katevenis
260	0	0	\|a Cambridge, Mass \|b MIT Press \|c c1985
300	0	0	\|a 215 p. \|b ill \|c 24 cm.
490	1	0	\|a ACM doctoral dissertation awards \|v 1984
500	0	0	\|a Includes index
595	0	0	\|a 0262111039
650	0	0	\|a Computer architecture
650	0	0	\|a Integrated circuits \|x Very large scale integration
840	0	0	\|a ACM doctoral dissertation award \|v 1984
942			\|2 ddc
994			\|a 001045614 86304 0001
999			\|c 32159 \|d 32159
952			\|0 0 \|1 0 \|4 0 \|7 0 \|8 MN \|a ML015 \|b ML015 \|c MN \|d 2024-06-02 \|l 0 \|o 621.38195835 K19r \|p 045614 \|r 2018-03-24 00:00:00 \|w 2018-03-24 \|y BK